Development of a Pixel Readout Chip for BTeV
FPIX1 output is LVDS to a parallel bus
(pixel address + 2 bit ADC).
FPIX1 should be able to read out an average of ~2 pixel
This is close to fast enough for BTeV (simulations ==>
a luminosity of 2 x 1032 requires an average readout rate
of 1.25 pixel hits per 132 ns).
Relatively straightforward extensions* of the FPIX1
architecture should increase the readout rate by ~ a factor of 5.
* faster column token & data compression for clusters.