Silicon Pixel Sensor R&D at Fermilab

Notes on sensors

OR (Notes without Greek letters - Use if on a UNIX machine) This page is intended for easy reference; it contains nothing profound.

Sketch of 8x2 module (w/FPIX1's) showing location of bias point (opening in p-side passivation)

A request for bids has been sent out to a number of vendors for a sensor wafer containing Fermilab (BTeV) designs and CMS designs. The sensor will be n+ on n with p-stop isolation between n+ implants on the n-side of the wafer (no p-spray). The cost and real estate of this sensor wafer are both being shared 70%/30% between US/CMS and the Fermilab RHVD (Pixel) group.

The Fermilab sensor designs are very similar to the p-stop designs of the ATLAS "First Pixel Prototype."

The Fermilab portion of the wafer contains the following structures:

FPIX1_TIP5X1: A sensor with individual ("atoll") p-stops - designed to mate to 5 FPIX1 readout chips (1 per wafer).

FPIX1_SIP: A sensor with individual ("atoll") p-stops - designed to mate to a single FPIX1 readout chip (2 per wafer).

FPIX1_SCP: A sensor with a single common p-stop - designed to mate to a single FPIX1 readout chip (2 per wafer).

FPIX0_SIP: A sensor with individual ("atoll") p-stops - designed to mate to a single FPIX0 readout chip (4 per wafer).

FPIX0_SCP: A sensor with a single (floating) common p-stop - designed to mate to a single FPIX0 readout chip (3 per wafer).

FPIX0_SCP_EXT: A sensor with a single common p-stop which is extended to one side so that it may be biased - designed to mate to a single FPIX0 readout chip (2 per wafer).

SimonsCell: Diodes with a variety of guard ring configurations (8 per wafer).

Wafer map showing BTeV parts on the joint BTeV/CMS sensor wafer


Last Updated on 4/8/99
By David Christian